2403ecb046
This is an input-only gpio driver for use with 74x165 style parallel-input shift registers, (using SPI peripheral) The user can choose to either use cs-gpios of spi or load-gpios for connecting to the SH/LD pin of the shift register. The difference is that cs-gpios will keep the input latch enabled while idle, and load-gpios will instead pulse the SH/LD signal before the register content is shifted. In both cases the gpio should be configured GPIO_ACTIVE_HIGH.
25 lines
576 B
Text
25 lines
576 B
Text
# 165 GPIO configuration options
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# Copyright (c) 2022 The ZMK Contributors
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# SPDX-License-Identifier: MIT
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DT_COMPAT_ZMK_GPIO_165 := zmk,gpio-165
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menuconfig GPIO_165
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bool "165 Parallel Input Shift Register SPI driver"
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default $(dt_compat_enabled,$(DT_COMPAT_ZMK_GPIO_165))
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depends on SPI
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select HAS_DTS_GPIO
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select ZMK_DRIVERS_GPIO
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help
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Enable driver for 165 shift register chip using SPI.
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if GPIO_165
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config GPIO_165_INIT_PRIORITY
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int "Init priority"
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default 75
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help
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Device driver initialization priority.
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endif #GPIO_165
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