98fcff0b5f
Add the initial input driver for the Cirque Pinnacle ASIC found in Cirque GlidePoint trackpads.
95 lines
3.6 KiB
C
95 lines
3.6 KiB
C
#pragma once
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#include <zephyr/device.h>
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#include <zephyr/drivers/spi.h>
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#include <zephyr/drivers/i2c.h>
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#define PINNACLE_READ 0xA0
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#define PINNACLE_WRITE 0x80
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#define PINNACLE_AUTOINC 0xFC
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#define PINNACLE_FILLER 0xFB
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// Registers
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#define PINNACLE_FW_ID 0x00 // ASIC ID.
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#define PINNACLE_FW_VER 0x01 // Firmware Version Firmware revision number.
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#define PINNACLE_STATUS1 0x02 // Contains status flags about the state of Pinnacle.
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#define PINNACLE_STATUS1_SW_DR BIT(2)
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#define PINNACLE_STATUS1_SW_CC BIT(3)
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#define PINNACLE_SYS_CFG 0x03 // Contains system operation and configuration bits.
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#define PINNACLE_SYS_CFG_EN_SLEEP BIT(2)
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#define PINNACLE_SYS_CFG_SHUTDOWN BIT(1)
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#define PINNACLE_SYS_CFG_RESET BIT(0)
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#define PINNACLE_FEED_CFG1 0x04 // Contains feed operation and configuration bits.
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#define PINNACLE_FEED_CFG1_EN_FEED BIT(0)
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#define PINNACLE_FEED_CFG1_ABS_MODE BIT(1)
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#define PINNACLE_FEED_CFG1_DIS_FILT BIT(2)
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#define PINNACLE_FEED_CFG1_DIS_X BIT(3)
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#define PINNACLE_FEED_CFG1_DIS_Y BIT(4)
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#define PINNACLE_FEED_CFG1_INV_X BIT(6)
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#define PINNACLE_FEED_CFG1_INV_Y BIT(7)
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#define PINNACLE_FEED_CFG2 0x05 // Contains feed operation and configuration bits.
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#define PINNACLE_FEED_CFG2_EN_IM BIT(0) // Intellimouse
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#define PINNACLE_FEED_CFG2_DIS_TAP BIT(1) // Disable all taps
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#define PINNACLE_FEED_CFG2_DIS_SEC BIT(2) // Disable secondary tap
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#define PINNACLE_FEED_CFG2_DIS_SCRL BIT(3) // Disable scroll
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#define PINNACLE_FEED_CFG2_DIS_GE BIT(4) // Disable GlideExtend
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#define PINNACLE_FEED_CFG2_ROTATE_90 BIT(7) // Swap X & Y
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#define PINNACLE_CAL_CFG 0x07 // Contains calibration configuration bits.
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#define PINNACLE_PS2_AUX 0x08 // Contains Data register for PS/2 Aux Control.
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#define PINNACLE_SAMPLE 0x09 // Sample Rate Number of samples generated per second.
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#define PINNACLE_Z_IDLE 0x0A // Number of Z=0 packets sent when Z goes from >0 to 0.
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#define PINNACLE_Z_SCALER 0x0B // Contains the pen Z_On threshold.
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#define PINNACLE_SLEEP_INTERVAL 0x0C // Sleep Interval
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#define PINNACLE_SLEEP_TIMER 0x0D // Sleep Timer
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#define PINNACLE_AG_PACKET0 0x10 // trackpad Data (Pinnacle AG)
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#define PINNACLE_2_2_PACKET0 0x12 // trackpad Data
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#define PINNACLE_REG_COUNT 0x18
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#define PINNACLE_REG_ERA_VALUE 0x1B
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#define PINNACLE_REG_ERA_HIGH_BYTE 0x1C
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#define PINNACLE_REG_ERA_LOW_BYTE 0x1D
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#define PINNACLE_REG_ERA_CONTROL 0x1E
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#define PINNACLE_ERA_CONTROL_READ 0x01
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#define PINNACLE_ERA_CONTROL_WRITE 0x02
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#define PINNACLE_ERA_REG_TRACKING_ADC_CONFIG 0x0187
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#define PINNACLE_TRACKING_ADC_CONFIG_1X 0x00
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#define PINNACLE_TRACKING_ADC_CONFIG_2X 0x40
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#define PINNACLE_TRACKING_ADC_CONFIG_3X 0x80
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#define PINNACLE_TRACKING_ADC_CONFIG_4X 0xC0
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#define PINNACLE_PACKET0_BTN_PRIM BIT(0) // Primary button
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#define PINNACLE_PACKET0_BTN_SEC BIT(1) // Secondary button
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#define PINNACLE_PACKET0_BTN_AUX BIT(2) // Auxiliary (middle?) button
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#define PINNACLE_PACKET0_X_SIGN BIT(4) // X delta sign
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#define PINNACLE_PACKET0_Y_SIGN BIT(5) // Y delta sign
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struct pinnacle_data {
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uint8_t btn_cache;
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bool in_int;
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const struct device *dev;
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struct gpio_callback gpio_cb;
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struct k_work work;
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};
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enum pinnacle_sensitivity {
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PINNACLE_SENSITIVITY_1X,
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PINNACLE_SENSITIVITY_2X,
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PINNACLE_SENSITIVITY_3X,
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PINNACLE_SENSITIVITY_4X,
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};
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struct pinnacle_config {
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#if DT_INST_ON_BUS(0, i2c)
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const struct i2c_dt_spec bus;
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#elif DT_INST_ON_BUS(0, spi)
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const struct spi_dt_spec bus;
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#endif
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bool rotate_90, sleep_en, no_taps;
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enum pinnacle_sensitivity sensitivity;
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const struct gpio_dt_spec dr;
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};
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