/*
 * Copyright (c) 2021 The ZMK Contributors
 *
 * SPDX-License-Identifier: MIT
 */


/ {
    chosen {
        zephyr,console = &cdc_acm_uart;
        zmk,battery = &vbatt;
    };

    vbatt: vbatt {
        compatible = "zmk,battery-voltage-divider";
        io-channels = <&adc 7>;
        power-gpios = <&gpio0 14 (GPIO_OPEN_DRAIN | GPIO_ACTIVE_LOW)>;
        output-ohms = <510000>;
        full-ohms = <(1000000 + 510000)>;
    };
};

&adc {
    status = "okay";
};

&usbd {
    cdc_acm_uart: cdc_acm_uart {
        compatible = "zephyr,cdc-acm-uart";
    };
};

&qspi {status = "disabled"; };

&spi2_default {
    group1 {
        psels = <NRF_PSEL(SPIM_SCK, 0, 21)>,
                <NRF_PSEL(SPIM_MOSI, 0, 20)>,
                <NRF_PSEL(SPIM_MISO, 0, 24)>;
    };
};

&spi2_sleep {
    group1 {
        psels = <NRF_PSEL(SPIM_SCK, 0, 21)>,
                <NRF_PSEL(SPIM_MOSI, 0, 20)>,
                <NRF_PSEL(SPIM_MISO, 0, 24)>;
        low-power-enable;
    };
};

&spi2 {
    status = "okay";
    pinctrl-0 = <&spi2_default>;
    pinctrl-1 = <&spi2_sleep>;
    pinctrl-names = "default", "sleep";
    cs-gpios = <&gpio0 25 GPIO_ACTIVE_LOW>;
    p25q16h_spi: p25q16h@0 {
        compatible = "jedec,spi-nor";
        reg = <0>;
        wp-gpios = <&gpio0 22 GPIO_ACTIVE_LOW>;
        hold-gpios = <&gpio0 23 GPIO_ACTIVE_LOW>;
        spi-max-frequency = <104000000>;
        jedec-id = [ 85 60 15  ];
        sfdp-bfp = [ e5 20 f1 ff ff ff ff 00 44 eb 08 6b 08 3b 80 bb ee ff ff ff ff ff 00 ff ff ff 00 ff 0c 20 0f 52 10 d8 08 81  ];
        size = <16777216>;
        has-dpd;
        t-enter-dpd = <3000>;
        t-exit-dpd = <8000>;
    };
};