diff --git a/app/drivers/sensor/CMakeLists.txt b/app/drivers/sensor/CMakeLists.txt index b549320f..02696974 100644 --- a/app/drivers/sensor/CMakeLists.txt +++ b/app/drivers/sensor/CMakeLists.txt @@ -2,4 +2,5 @@ # SPDX-License-Identifier: MIT add_subdirectory_ifdef(CONFIG_ZMK_BATTERY battery) -add_subdirectory_ifdef(CONFIG_EC11 ec11) \ No newline at end of file +add_subdirectory_ifdef(CONFIG_EC11 ec11) +add_subdirectory_ifdef(CONFIG_PMW33xx pmw33xx) diff --git a/app/drivers/sensor/Kconfig b/app/drivers/sensor/Kconfig index a828f6c6..52eaca0a 100644 --- a/app/drivers/sensor/Kconfig +++ b/app/drivers/sensor/Kconfig @@ -2,4 +2,5 @@ # SPDX-License-Identifier: MIT rsource "battery/Kconfig" -rsource "ec11/Kconfig" \ No newline at end of file +rsource "ec11/Kconfig" +rsource "pmw33xx/Kconfig" diff --git a/app/drivers/sensor/pmw33xx/.gitignore b/app/drivers/sensor/pmw33xx/.gitignore new file mode 100644 index 00000000..ee2a286b --- /dev/null +++ b/app/drivers/sensor/pmw33xx/.gitignore @@ -0,0 +1 @@ +pmw3389_srom.h diff --git a/app/drivers/sensor/pmw33xx/CMakeLists.txt b/app/drivers/sensor/pmw33xx/CMakeLists.txt new file mode 100644 index 00000000..011b4cac --- /dev/null +++ b/app/drivers/sensor/pmw33xx/CMakeLists.txt @@ -0,0 +1,10 @@ +# Copyright (c) 2022 The ZMK Contributors +# SPDX-License-Identifier: MIT + +zephyr_include_directories(.) +zephyr_include_directories_ifdef(CONFIG_PMW33XX_3389 CONFIG_PMW33XX_3389_SROM_INCLUDE_DIR) + +zephyr_library() + +zephyr_library_sources(pmw33xx.c) +zephyr_library_sources_ifdef(CONFIG_PMW33XX_TRIGGER pmw33xx_trigger.c) diff --git a/app/drivers/sensor/pmw33xx/Kconfig b/app/drivers/sensor/pmw33xx/Kconfig new file mode 100644 index 00000000..b6a926f0 --- /dev/null +++ b/app/drivers/sensor/pmw33xx/Kconfig @@ -0,0 +1,69 @@ +# Copyright (c) 2022 The ZMK Contributors +# SPDX-License-Identifier: MIT +config PMW33XX + bool "PMW33XX Mouse Sensor" + depends on SPI + help + Enable mouse sensor + + The PMW33XX is a 16-bit optical mouse sensor + +if PMW33XX +choice + prompt "Sensor" + default PMW33XX_3360 + + config PMW33XX_3360 + bool "Enable PMW3360" + + config PMW33XX_3389 + bool "Enable PMW3389" + help + PMW3389 requires an external srom included in `pmw3389_srom.h` which we cannot currently include in zmk +endchoice + +config PMW33XX_3389_SROM_INCLUDE_DIR + string "PMW3389 SROM Include Dir" + default "." + help + directory where the header with the pmw3389 srom file is located + +choice + prompt "Trigger mode" + default PMW33XX_TRIGGER_NONE + help + Specify the type of triggering to be used by the driver. + +config PMW33XX_TRIGGER_NONE + bool "No trigger" + +config PMW33XX_TRIGGER_GLOBAL_THREAD + bool "Use global thread" + depends on GPIO + select PMW33XX_TRIGGER + +config PMW33XX_TRIGGER_OWN_THREAD + bool "Use own thread" + depends on GPIO + select PMW33XX_TRIGGER + +endchoice + +config PMW33XX_TRIGGER + bool + +config PMW33XX_THREAD_PRIORITY + int "Thread priority" + depends on PMW33XX_TRIGGER_OWN_THREAD + default 10 + help + Priority of thread used by the driver to handle interrupts. + +config PMW33XX_THREAD_STACK_SIZE + int "Thread stack size" + depends on PMW33XX_TRIGGER_OWN_THREAD + default 1024 + help + Stack size of thread used by the driver to handle interrupts. + +endif # PMW33XX diff --git a/app/drivers/sensor/pmw33xx/pmw3360_srom.h b/app/drivers/sensor/pmw33xx/pmw3360_srom.h new file mode 100644 index 00000000..44a5b316 --- /dev/null +++ b/app/drivers/sensor/pmw33xx/pmw3360_srom.h @@ -0,0 +1,291 @@ +/* +This SROM is provided "AS IS" by PixArt Imaging Inc., WITHOUT WARRANTY +OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO +THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR +PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL PIXART +IMAGING INC. BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER +LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR +OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THIS +SROM OR THE USE OR OTHER DEALINGS IN THIS SROM. +*/ + +#ifndef ZEPHYR_DRIVERS_SENSOR_PIXART_PMW33XX_PMW3360_SROM_H_ +#define ZEPHYR_DRIVERS_SENSOR_PIXART_PMW33XX_PMW3360_SROM_H_ + +#include +static const uint8_t SROM[] = { + 0x01, 0x05, 0x8d, 0x92, 0x66, 0x67, 0x1e, 0xbe, 0xfe, 0x5f, 0x1d, 0xb8, 0xf2, 0x66, 0x4e, + 0xff, 0x5d, 0x38, 0xf2, 0x46, 0x0c, 0x98, 0x97, 0x8d, 0x79, 0x51, 0x20, 0xc2, 0x06, 0x8e, + 0x9e, 0xbe, 0xfe, 0x7e, 0x5f, 0x1d, 0xb8, 0xd3, 0x24, 0xca, 0x16, 0x8f, 0x7d, 0x78, 0x53, + 0x05, 0x88, 0x73, 0x45, 0xe9, 0x55, 0x22, 0xa7, 0xae, 0xd8, 0x32, 0xe6, 0x2f, 0xbd, 0xf8, + 0x72, 0x47, 0x0c, 0x7b, 0x74, 0x6a, 0x56, 0x2e, 0xbf, 0xdd, 0x38, 0xd5, 0x20, 0xca, 0x16, + 0xae, 0xde, 0x1f, 0x9d, 0xb8, 0xf2, 0x47, 0x0c, 0x7b, 0x55, 0x28, 0xd2, 0x26, 0xaf, 0xdc, + 0x3a, 0xd7, 0x2c, 0xbb, 0xd5, 0x09, 0x90, 0xa2, 0xa7, 0xcc, 0xfb, 0x74, 0x4b, 0xf5, 0x49, + 0x10, 0x83, 0x84, 0x8a, 0x77, 0x4d, 0x18, 0xb2, 0xe6, 0x4e, 0x1e, 0x9f, 0xbc, 0xfa, 0x6a, + 0xea, 0xab, 0x55, 0x91, 0xa9, 0xda, 0x58, 0xa9, 0xe1, 0x1a, 0xc2, 0x52, 0x1c, 0x0d, 0xef, + 0x50, 0x71, 0x04, 0x21, 0x93, 0x87, 0x0e, 0xb1, 0xa9, 0x4a, 0xc0, 0x24, 0xaf, 0xe3, 0x26, + 0xa2, 0x8d, 0xa1, 0x6d, 0xf2, 0x88, 0x9e, 0x99, 0xbb, 0xf2, 0x62, 0x38, 0xfe, 0x78, 0x1d, + 0x58, 0x19, 0x9b, 0xbe, 0x10, 0x6c, 0x15, 0x9e, 0x50, 0x8b, 0x99, 0x40, 0x92, 0x01, 0x38, + 0xb6, 0x97, 0x83, 0x51, 0x59, 0xa6, 0xb7, 0xc9, 0x48, 0xfd, 0x68, 0x21, 0x78, 0xf4, 0x2e, + 0x86, 0x61, 0xb0, 0xb2, 0x2b, 0x5b, 0xf0, 0x1b, 0x71, 0xa3, 0x0a, 0xd5, 0xd6, 0x30, 0x7a, + 0x0c, 0xf8, 0xaf, 0xc6, 0x54, 0x6b, 0x89, 0x30, 0x58, 0xe8, 0xe2, 0x0d, 0x39, 0x2f, 0x47, + 0xa0, 0x41, 0x74, 0x5d, 0xd6, 0xf3, 0x85, 0xb7, 0x66, 0x59, 0x51, 0x74, 0x3d, 0xfe, 0xee, + 0x3a, 0x1e, 0x2a, 0x5f, 0x93, 0x0c, 0x3f, 0xd4, 0x4d, 0x24, 0x13, 0x2c, 0xf2, 0x7b, 0x4d, + 0x06, 0x60, 0x2e, 0x39, 0xa9, 0xd4, 0x72, 0x36, 0xb6, 0x4d, 0xea, 0x8c, 0xd9, 0xa7, 0xbc, + 0x38, 0xe7, 0xbb, 0xb7, 0x7b, 0x04, 0x08, 0x83, 0x5a, 0x27, 0x6f, 0x42, 0xc6, 0x7e, 0xbd, + 0x97, 0x0e, 0x55, 0xdc, 0x79, 0x63, 0xd8, 0x89, 0xc1, 0x83, 0x3d, 0x34, 0x01, 0x76, 0xff, + 0xde, 0x7f, 0x65, 0x4b, 0xb3, 0x46, 0x56, 0x8d, 0x9e, 0x6f, 0x1f, 0x2b, 0xa4, 0x69, 0x54, + 0xde, 0x1c, 0x2d, 0xa8, 0x51, 0x7e, 0xdf, 0xbb, 0x18, 0x90, 0x27, 0xaf, 0x79, 0xd1, 0x86, + 0x4f, 0x44, 0x88, 0x7f, 0xb9, 0x80, 0x21, 0xa9, 0x5d, 0x7b, 0xd4, 0x81, 0x21, 0xa9, 0x13, + 0x59, 0x72, 0x58, 0x11, 0xe3, 0xf2, 0xf7, 0xae, 0xc3, 0xc2, 0x64, 0x1d, 0xfb, 0xd8, 0x91, + 0x2d, 0x13, 0xb5, 0x0e, 0x67, 0xdb, 0xbc, 0x63, 0xde, 0xa0, 0x86, 0x49, 0x6c, 0x40, 0x82, + 0x82, 0x3f, 0xeb, 0x38, 0x22, 0xa8, 0x20, 0x1e, 0xc5, 0x5f, 0x25, 0xea, 0xaf, 0xe6, 0x78, + 0x1c, 0x41, 0x0b, 0x5a, 0x94, 0xcc, 0x8d, 0x0d, 0xc5, 0xb8, 0x9c, 0x1a, 0x9f, 0x6d, 0xa8, + 0x57, 0xe9, 0x1a, 0xf0, 0xad, 0x6c, 0x26, 0x5f, 0xb8, 0x38, 0x16, 0x0e, 0x28, 0xd6, 0x76, + 0x5a, 0xc2, 0xb7, 0x6a, 0x9e, 0x26, 0x9d, 0x3e, 0x1f, 0x25, 0xb0, 0x14, 0x46, 0xcd, 0x67, + 0x49, 0x93, 0x13, 0x81, 0x01, 0x46, 0x72, 0x31, 0x42, 0x91, 0x87, 0x6c, 0x1c, 0xb8, 0x08, + 0x72, 0x6a, 0x33, 0x64, 0xed, 0xc0, 0x99, 0xb9, 0xf6, 0x34, 0xe9, 0xa5, 0x6c, 0x57, 0x9a, + 0x72, 0x18, 0x48, 0x62, 0xc1, 0x88, 0xcf, 0xa3, 0x50, 0x53, 0x50, 0xdf, 0xc8, 0x9f, 0xf0, + 0xb6, 0xa2, 0x23, 0xc4, 0xaa, 0xe3, 0xd0, 0xe2, 0xab, 0x76, 0xc8, 0x4a, 0x02, 0x21, 0xdd, + 0xf3, 0x59, 0xdc, 0x30, 0x6e, 0xb5, 0x42, 0xe2, 0x9d, 0x8a, 0xdf, 0xfd, 0xa5, 0x41, 0x75, + 0x01, 0x83, 0xbe, 0x47, 0xa5, 0x21, 0x30, 0x3b, 0x0e, 0x33, 0x2e, 0x74, 0xaf, 0x27, 0x90, + 0xf4, 0x20, 0xa7, 0x1b, 0xff, 0x77, 0x01, 0xab, 0x79, 0x0a, 0xfb, 0x86, 0x1e, 0x1f, 0x22, + 0x6d, 0x75, 0x75, 0xfc, 0xe0, 0x8c, 0xa2, 0x72, 0x0f, 0x45, 0x48, 0xf9, 0x43, 0x10, 0xf0, + 0x57, 0x15, 0x17, 0x74, 0x40, 0x8f, 0x77, 0x69, 0x8a, 0xd4, 0x0f, 0x25, 0x27, 0x0a, 0xe8, + 0x84, 0x73, 0x41, 0xb9, 0x5f, 0xb6, 0xc8, 0x2f, 0x02, 0x83, 0xdc, 0x1e, 0x1c, 0xdb, 0x3f, + 0x2d, 0x58, 0xf7, 0x5e, 0xfd, 0x6f, 0xda, 0xad, 0xdc, 0x43, 0x01, 0x22, 0xc6, 0x45, 0x9c, + 0xec, 0x56, 0x8a, 0x1a, 0x4e, 0xaa, 0xae, 0x3a, 0xa1, 0xf3, 0xf1, 0x9a, 0x97, 0x8d, 0x79, + 0x51, 0x01, 0xf5, 0x31, 0x04, 0xcd, 0x2a, 0xbc, 0xfd, 0xac, 0x59, 0x1b, 0x0a, 0xe2, 0x26, + 0xdd, 0x2f, 0x96, 0xaa, 0x62, 0xc5, 0x6d, 0xb8, 0xe1, 0x72, 0x4e, 0x4e, 0xb7, 0x4f, 0x9f, + 0xaa, 0x33, 0x75, 0x8b, 0x43, 0x44, 0x0a, 0xc3, 0x0a, 0x5e, 0x9c, 0xdb, 0x1e, 0x4e, 0xbd, + 0x0f, 0xec, 0x09, 0x96, 0x5a, 0x37, 0x6d, 0x10, 0x44, 0xd4, 0x91, 0xc0, 0xc3, 0x0d, 0x35, + 0x62, 0xcf, 0x0a, 0xb1, 0x1a, 0x8a, 0xda, 0xa8, 0xcf, 0xbc, 0x3a, 0xb2, 0x4f, 0x59, 0x29, + 0xd9, 0x91, 0x96, 0x0d, 0x6b, 0x9c, 0xcf, 0x34, 0x5b, 0x76, 0x7b, 0xb2, 0xb2, 0xce, 0xbf, + 0x72, 0xd9, 0x96, 0x4a, 0xc0, 0x2d, 0x89, 0x33, 0xd0, 0xe4, 0xbe, 0x69, 0x7f, 0x1c, 0x9e, + 0x71, 0x19, 0x12, 0xf6, 0x74, 0xfb, 0xd6, 0x41, 0x95, 0x69, 0xf0, 0xe9, 0xa7, 0x50, 0x82, + 0x04, 0x78, 0x4d, 0x99, 0xb3, 0xa7, 0xfe, 0xee, 0x7f, 0xed, 0x56, 0x57, 0x57, 0xe9, 0xd3, + 0x6a, 0x43, 0xf4, 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0xb1, 0xe0, 0x42, 0xe7, 0x4c, 0xfb, 0x74, + 0x6a, 0x37, 0xec, 0x5a, 0x17, 0xac, 0xbb, 0xd5, 0x28, 0xd2, 0x07, 0x6d, 0x58, 0x13, 0x85, + 0x69, 0x31, 0xe0, 0x42, 0xe7, 0x4c, 0xfb, 0x55, 0x28, 0xd2, 0x07, 0x8c, 0x7b, 0x74, 0x4b, + 0x14, 0xaa, 0xd6, 0x2e, 0xde, 0x3e, 0xfe, 0x7e, 0x5f, 0x1d, 0xb8, 0xf2, 0x47, 0x0c, 0x7b, + 0x55, 0x09, 0x90, 0x83, 0x65, 0x48, 0x12, 0x87, 0x6d, 0x39, 0xf0, 0x62, 0x46, 0x0e, 0x9e, + 0x9f, 0xbc, 0xfa, 0x57, 0x2c, 0xbb, 0xd5, 0x09, 0x71, 0x60, 0x5b, 0x08, 0xf7, 0x2b, +}; +#endif diff --git a/app/drivers/sensor/pmw33xx/pmw33xx.c b/app/drivers/sensor/pmw33xx/pmw33xx.c new file mode 100644 index 00000000..486a885c --- /dev/null +++ b/app/drivers/sensor/pmw33xx/pmw33xx.c @@ -0,0 +1,397 @@ +/* + * Copyright (c) 2022 The ZMK Contributors + * + * SPDX-License-Identifier: MIT + */ +#define DT_DRV_COMPAT pixart_pmw33xx + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#ifdef CONFIG_PMW33XX_3389 +#include +#elif CONFIG_PMW33XX_3360 +#include +#endif + +#include "pmw33xx.h" + +LOG_MODULE_REGISTER(PMW33XX, CONFIG_SENSOR_LOG_LEVEL); +#define PMW33XX_PID COND_CODE_1(CONFIG_PMW33XX_3389, (PMW33XX_3389_PID), (PMW33XX_3360_PID)) +#define PMW33XX_CPI_MAX \ + COND_CODE_1(CONFIG_PMW33XX_3389, (PMW33XX_3389_CPI_MAX), (PMW33XX_3360_CPI_MAX)) +#define PMW33XX_CPI_MIN \ + COND_CODE_1(CONFIG_PMW33XX_3389, (PMW33XX_3389_CPI_MIN), (PMW33XX_3360_CPI_MIN)) + +struct pmw33xx_motion_burst { + uint8_t motion; + uint8_t observation; + int16_t dx; + int16_t dy; +} __attribute__((packed)); + +static inline int pmw33xx_cs_select(const struct pmw33xx_gpio_dt_spec *cs_gpio_cfg, + const uint8_t value) { + return gpio_pin_set(cs_gpio_cfg->port, cs_gpio_cfg->pin, value); +} + +static int pmw33xx_access(const struct device *dev, const uint8_t reg, uint8_t *value) { + struct pmw33xx_data *data = dev->data; + const struct pmw33xx_config *cfg = dev->config; + const struct spi_config *spi_cfg = &cfg->bus_cfg.spi_cfg->spi_conf; + const struct pmw33xx_gpio_dt_spec *cs_gpio_cfg = &cfg->bus_cfg.spi_cfg->cs_spec; + + uint8_t access[1] = {reg}; + struct spi_buf_set tx = { + .buffers = + &(struct spi_buf){ + .buf = access, + .len = 1, + }, + .count = 1, + }; + + uint8_t result[1]; + if (value != NULL) { + result[0] = *value; + } + struct spi_buf_set rx = { + .buffers = + &(struct spi_buf){ + .buf = result, + .len = 1, + }, + .count = 1, + }; + + pmw33xx_cs_select(cs_gpio_cfg, 0); + + int err = spi_write(data->bus, spi_cfg, &tx); + k_sleep(K_USEC(120)); // Tsrad + if (err) { + pmw33xx_cs_select(cs_gpio_cfg, 1); + return err; + } + + if ((reg & PMW33XX_WR_MASK)) + err = spi_write(data->bus, spi_cfg, &rx); + else + err = spi_read(data->bus, spi_cfg, &rx); + pmw33xx_cs_select(cs_gpio_cfg, 1); + k_sleep(K_USEC(160)); + if ((reg & PMW33XX_WR_MASK) == 0 && value != NULL) + *value = result[0]; + return err; +} +static int pmw33xx_read_reg(const struct device *dev, const uint8_t reg, uint8_t *value) { + return pmw33xx_access(dev, reg & PMW33XX_RD_MASK, value); +} +static int pmw33xx_write_reg(const struct device *dev, const uint8_t reg, const uint8_t value) { + uint8_t v = value; + return pmw33xx_access(dev, reg | PMW33XX_WR_MASK, &v); +} + +static int pmw33xx_write_srom(const struct device *dev) { + struct pmw33xx_data *data = dev->data; + const struct pmw33xx_config *cfg = dev->config; + const struct spi_config *spi_cfg = &cfg->bus_cfg.spi_cfg->spi_conf; + const struct pmw33xx_gpio_dt_spec *cs_gpio_cfg = &cfg->bus_cfg.spi_cfg->cs_spec; + uint8_t access[1] = {PMW33XX_REG_SROM_BURST | PMW33XX_WR_MASK}; + struct spi_buf_set tx = { + .buffers = + &(struct spi_buf){ + .buf = access, + .len = 1, + }, + .count = 1, + }; + + pmw33xx_write_reg(dev, PMW33XX_REG_SROM_EN, PMW33XX_SROM_DWNLD_CMD); + k_sleep(K_USEC(15)); + pmw33xx_write_reg(dev, PMW33XX_REG_SROM_EN, PMW33XX_SROM_DWNLD_START_CMD); + + pmw33xx_cs_select(cs_gpio_cfg, 0); + + int err = spi_write(data->bus, spi_cfg, &tx); + + k_sleep(K_USEC(15)); + if (err) { + pmw33xx_cs_select(cs_gpio_cfg, 1); + return err; + } + + for (uint16_t i = 0; i < sizeof(SROM); i++) { + access[0] = SROM[i]; + err = spi_write(data->bus, spi_cfg, &tx); + k_sleep(K_USEC(15)); + if (err) { + pmw33xx_cs_select(cs_gpio_cfg, 1); + return err; + } + } + + pmw33xx_cs_select(cs_gpio_cfg, 1); + k_sleep(K_MSEC(2)); // Tbexit + return err; +} + +static int pmw33xx_read_motion_burst(const struct device *dev, struct pmw33xx_motion_burst *burst) { + struct pmw33xx_data *data = dev->data; + const struct pmw33xx_config *cfg = dev->config; + const struct spi_config *spi_cfg = &cfg->bus_cfg.spi_cfg->spi_conf; + const struct pmw33xx_gpio_dt_spec *cs_gpio_cfg = &cfg->bus_cfg.spi_cfg->cs_spec; + + uint8_t access[1] = {PMW33XX_REG_BURST}; + struct spi_buf_set tx = { + .buffers = + &(struct spi_buf){ + .buf = access, + .len = 1, + }, + .count = 1, + }; + struct spi_buf_set rx = { + .buffers = + &(struct spi_buf){ + .buf = (uint8_t *)burst, + .len = sizeof(struct pmw33xx_motion_burst), + }, + .count = 1, + }; + + pmw33xx_cs_select(cs_gpio_cfg, 0); + + int err = spi_write(data->bus, spi_cfg, &tx); + k_sleep(K_USEC(35)); // tsrad motbr + if (err) { + pmw33xx_cs_select(cs_gpio_cfg, 1); + return err; + } + err = spi_read(data->bus, spi_cfg, &rx); + pmw33xx_cs_select(cs_gpio_cfg, 1); +#ifdef CONFIG_PMW33XX_TRIGGER + pmw33xx_reset_motion(dev); +#endif + return err; +} + +#ifdef CONFIG_PMW33XX_TRIGGER +void pmw33xx_reset_motion(const struct device *dev) { + // reset motswk interrupt + pmw33xx_read_reg(dev, PMW33XX_REG_MOTION, NULL); +} +#endif + +int pmw33xx_spi_init(const struct device *dev) { + const struct pmw33xx_config *cfg = dev->config; + const struct pmw33xx_gpio_dt_spec *cs_gpio_cfg = &cfg->bus_cfg.spi_cfg->cs_spec; + + int err; + err = gpio_pin_configure(cs_gpio_cfg->port, cs_gpio_cfg->pin, GPIO_OUTPUT_ACTIVE); + if (err) { + LOG_ERR("could configure cs pin %d", err); + return -EIO; + } + return 0; +} + +static int pmw33xx_sample_fetch(const struct device *dev, enum sensor_channel chan) { + struct pmw33xx_data *data = dev->data; + struct pmw33xx_motion_burst burst; + + if (chan != SENSOR_CHAN_ALL && chan != SENSOR_CHAN_POS_DX && chan != SENSOR_CHAN_POS_DY) + return -ENOTSUP; + + int err = pmw33xx_read_motion_burst(dev, &burst); + if (err) { + return err; + } + if (chan == SENSOR_CHAN_ALL || chan == SENSOR_CHAN_POS_DX) + data->dx += burst.dx; + if (chan == SENSOR_CHAN_ALL || chan == SENSOR_CHAN_POS_DY) + data->dy += burst.dy; + return 0; +} + +static int pmw33xx_channel_get(const struct device *dev, enum sensor_channel chan, + struct sensor_value *val) { + struct pmw33xx_data *data = dev->data; + + switch (chan) { + case SENSOR_CHAN_POS_DX: + val->val1 = data->dx; + data->dx = 0; + break; + case SENSOR_CHAN_POS_DY: + val->val1 = data->dy; + data->dy = 0; + break; + default: + return -ENOTSUP; + } + + return 0; +} + +static const struct sensor_driver_api pmw33xx_driver_api = { +#ifdef CONFIG_PMW33XX_TRIGGER + .trigger_set = pmw33xx_trigger_set, +#endif + // eventually implement this to allow setting cpi from the driver api maybe + // .attr_set = pmw33xx_attr_set, + .sample_fetch = pmw33xx_sample_fetch, + .channel_get = pmw33xx_channel_get, +}; + +static int pmw33xx_set_cpi(const struct device *dev, uint16_t cpi) { +#ifdef CONFIG_PMW33XX_3360 + if (cpi > PMW33XX_CPI_MIN && cpi < PMW33XX_CPI_MAX) + return pmw33xx_write_reg(dev, PMW33XX_3360_REG_CPI, + ((cpi / 100) - 1)); /* 100-12000, 100 cpi LSb */ +#elif CONFIG_PMW33XX_3389 + if (cpi > PMW33XX_CPI_MIN && cpi < PMW33XX_CPI_MAX) { + cpi /= 50; + int err = + pmw33xx_write_reg(dev, PMW33XX_3389_REG_CPI_L, cpi & 0xFF); /* 50-16000, 50 cpi LSb */ + if (err) { + return err; + } + return pmw33xx_write_reg(dev, PMW33XX_3389_REG_CPI_H, cpi >> 8); /* 50-16000, 50 cpi LSb */ + } +#endif + return -ENOTSUP; +} +static int pmw33xx_init_chip(const struct device *dev) { + const struct pmw33xx_config *const config = dev->config; + const struct pmw33xx_gpio_dt_spec *cs_gpio_cfg = &config->bus_cfg.spi_cfg->cs_spec; + pmw33xx_cs_select(cs_gpio_cfg, 1); + k_sleep(K_MSEC(1)); + + int err = pmw33xx_write_reg(dev, PMW33XX_REG_PWR_UP_RST, PMW33XX_RESET_CMD); + if (err) { + LOG_ERR("could not reset %d", err); + return -EIO; + } + uint8_t pid = 0x0; + err = pmw33xx_read_reg(dev, PMW33XX_REG_PID, &pid); + if (err) { + LOG_ERR("could not reset %d", err); + return -EIO; + } + if (pid != PMW33XX_PID) { + LOG_ERR("pid does not match expected: got (%x), expected(%x)", pid, PMW33XX_PID); + return -EIO; + } + pmw33xx_write_reg(dev, PMW33XX_REG_CONFIG2, + config->disable_rest ? 0x00 : PMW33XX_RESTEN); // set rest enable + + err = pmw33xx_write_srom(dev); + if (err) { + LOG_ERR("could not upload srom %d", err); + return -EIO; + } + uint8_t srom_run = 0x0; + err = pmw33xx_read_reg(dev, PMW33XX_REG_OBSERVATION, &srom_run); + if (err) { + LOG_ERR("could not check srom status %d", err); + return -EIO; + } + if (!(srom_run & PMW33XX_SROM_RUN)) { + LOG_ERR("srom status invalid %d", srom_run); + return -EIO; + } + + uint8_t srom_id = 0x0; + err = pmw33xx_read_reg(dev, PMW33XX_REG_SROM_ID, &srom_id); + if (err) { + LOG_ERR("could not check srom id %d", err); + return -EIO; + } + if (!srom_id) { + LOG_ERR("srom id invalid %d", srom_id); + return -EIO; + } + + pmw33xx_write_reg(dev, PMW33XX_REG_BURST, 0x01); + struct pmw33xx_motion_burst val; + pmw33xx_read_motion_burst(dev, &val); // read and throwout initial motion data + + if (config->cpi > PMW33XX_CPI_MIN && config->cpi < PMW33XX_CPI_MAX) + return pmw33xx_set_cpi(dev, config->cpi); + return 0; +} + +static int pmw33xx_init(const struct device *dev) { + const struct pmw33xx_config *const config = dev->config; + struct pmw33xx_data *data = dev->data; + + data->bus = device_get_binding(config->bus_name); + if (!data->bus) { + LOG_DBG("master not found: %s", log_strdup(config->bus_name)); + return -EINVAL; + } + + config->bus_init(dev); + + if (pmw33xx_init_chip(dev) < 0) { + LOG_DBG("failed to initialize chip"); + return -EIO; + } + +#ifdef CONFIG_PMW33XX_TRIGGER + if (pmw33xx_init_interrupt(dev) < 0) { + LOG_DBG("Failed to initialize interrupt!"); + return -EIO; + } +#endif + + return 0; +} + +#define PMW33XX_DATA_SPI(n) \ + { .cs_ctrl = {}, } + +#define PMW33XX_SPI_CFG(n) \ + (&(struct pmw33xx_spi_cfg){ \ + .spi_conf = \ + { \ + .frequency = DT_INST_PROP(n, spi_max_frequency), \ + .operation = \ + (SPI_WORD_SET(8) | SPI_OP_MODE_MASTER | SPI_MODE_CPOL | SPI_MODE_CPHA), \ + .slave = DT_INST_REG_ADDR(n), \ + }, \ + .cs_spec = PMW33XX_GPIO_DT_SPEC_GET_BY_IDX(DT_DRV_INST(n), cs_gpios, 0), \ + }) + +#define PMW33XX_GPIO_DT_SPEC_GET_BY_IDX(node_id, prop, idx) \ + { \ + .port = DEVICE_DT_GET(DT_GPIO_CTLR_BY_IDX(node_id, prop, idx)), \ + .pin = DT_GPIO_PIN_BY_IDX(node_id, prop, idx), \ + .dt_flags = DT_GPIO_FLAGS_BY_IDX(node_id, prop, idx), \ + } + +#define PMW33XX_CONFIG_SPI(n) \ + { \ + .bus_name = DT_INST_BUS_LABEL(n), .bus_init = pmw33xx_spi_init, \ + .bus_cfg = {.spi_cfg = PMW33XX_SPI_CFG(n)}, \ + .disable_rest = DT_INST_NODE_HAS_PROP(n, disable_rest), \ + COND_CODE_0(DT_INST_NODE_HAS_PROP(n, cpi), (0), (DT_INST_PROP(n, cpi))) \ + COND_CODE_1(CONFIG_PMW33XX_TRIGGER, \ + (, PMW33XX_GPIO_DT_SPEC_GET_BY_IDX(DT_DRV_INST(n), motswk_gpios, 0)), ()) \ + } + +#define PMW33XX_INST(n) \ + static struct pmw33xx_data pmw33xx_data_##n = PMW33XX_DATA_SPI(n); \ + static const struct pmw33xx_config pmw33xx_cfg_##n = PMW33XX_CONFIG_SPI(n); \ + DEVICE_DT_INST_DEFINE(n, pmw33xx_init, device_pm_control_nop, &pmw33xx_data_##n, \ + &pmw33xx_cfg_##n, POST_KERNEL, CONFIG_SENSOR_INIT_PRIORITY, \ + &pmw33xx_driver_api); + +DT_INST_FOREACH_STATUS_OKAY(PMW33XX_INST) diff --git a/app/drivers/sensor/pmw33xx/pmw33xx.h b/app/drivers/sensor/pmw33xx/pmw33xx.h new file mode 100644 index 00000000..31119e65 --- /dev/null +++ b/app/drivers/sensor/pmw33xx/pmw33xx.h @@ -0,0 +1,150 @@ +/* + * Copyright (c) 2022 The ZMK Contributors + * + * SPDX-License-Identifier: MIT + */ +#ifndef ZEPHYR_DRIVERS_SENSOR_PIXART_PMW33XX_H_ +#define ZEPHYR_DRIVERS_SENSOR_PIXART_PMW33XX_H_ + +#include +#include +#include +#include +#include + +#define PMW33XX_WR_MASK 0x80 +#define PMW33XX_RD_MASK 0x7F + +#define PMW33XX_3389_PID 0x47 +#define PMW33XX_3360_PID 0x42 +#define PMW33XX_REV 0x01 + +/* General Registers */ +#define PMW33XX_REG_PID 0x00 +#define PMW33XX_REG_REV_ID 0x01 +#define PMW33XX_REG_PWR_UP_RST 0x3A + +/* Motion Registers */ +#define PMW33XX_REG_MOTION 0x02 +#define PMW33XX_REG_DX_L 0x03 +#define PMW33XX_REG_DX_H 0x04 +#define PMW33XX_REG_DY_L 0x05 +#define PMW33XX_REG_DY_H 0x06 +#define PMW33XX_REG_BURST 0x50 + +/* Motion bits */ +#define PMW33XX_MOTION (1 << 8) +#define PMW33XX_OPMODE_RUN (0) +#define PMW33XX_OPMODE_REST1 (0b01 << 1) +#define PMW33XX_OPMODE_REST2 (0b10 << 1) +#define PMW33XX_OPMODE_REST3 (0b11 << 1) + +/* SROM Registers */ +#define PMW33XX_REG_SROM_EN 0x13 +#define PMW33XX_REG_SROM_ID 0x2A +#define PMW33XX_REG_SROM_BURST 0x62 + +/* SROM CMDs */ +#define PMW33XX_SROM_CRC_CMD 0x15 +#define PMW33XX_SROM_DWNLD_CMD 0x1D +#define PMW33XX_SROM_DWNLD_START_CMD 0x18 + +/* CPI Registers */ +#define PMW33XX_3360_REG_CPI 0x0F +#define PMW33XX_3389_REG_CPI_L 0x0E +#define PMW33XX_3389_REG_CPI_H 0x0F + +/* Config Registers */ +#define PMW33XX_REG_CONFIG2 0x10 +#define PMW33XX_REG_OBSERVATION 0x24 +#define PMW33XX_REG_DOUT_L 0x25 +#define PMW33XX_REG_DOUT_H 0x26 + +/* Config2 Bits */ +#define PMW33XX_RESTEN 0x20 +#define PMW33XX_RPT_MOD 0x04 + +/* Observation Bits */ +#define PMW33XX_SROM_RUN 0x40 + +/* power up reset cmd */ +#define PMW33XX_RESET_CMD 0x5A + +/* cpi max and min values */ +#define PMW33XX_3389_CPI_MIN 50 +#define PMW33XX_3389_CPI_MAX 16000 +#define PMW33XX_3360_CPI_MIN 100 +#define PMW33XX_3360_CPI_MAX 12000 + +struct pmw33xx_gpio_dt_spec { + const struct device *port; + gpio_pin_t pin; + gpio_dt_flags_t dt_flags; +}; + +struct pmw33xx_spi_cfg { + struct spi_config spi_conf; + struct pmw33xx_gpio_dt_spec cs_spec; +}; + +union pmw33xx_bus_cfg { + struct pmw33xx_spi_cfg *spi_cfg; +}; + +struct pmw33xx_config { + char *bus_name; + int (*bus_init)(const struct device *dev); + const union pmw33xx_bus_cfg bus_cfg; + bool disable_rest; + int cpi; +#if CONFIG_PMW33XX_TRIGGER + struct pmw33xx_gpio_dt_spec motswk_spec; +#endif // CONFIG_PMW33XX_TRIGGER +}; + +struct pmw33xx_data; + +struct pmw33xx_transfer_function { + int (*read_data)(const struct device *dev, int16_t *value); +}; + +struct pmw33xx_data { + const struct device *bus; + struct spi_cs_control cs_ctrl; + + int16_t dx; + int16_t dy; + + const struct pmw33xx_transfer_function *hw_tf; + +#ifdef CONFIG_PMW33XX_TRIGGER + + struct gpio_callback motswk_gpio_cb; + const struct device *dev; + + sensor_trigger_handler_t handler; + const struct sensor_trigger *trigger; + +#if defined(CONFIG_PMW33XX_TRIGGER_OWN_THREAD) + K_THREAD_STACK_MEMBER(thread_stack, CONFIG_PMW33XX_THREAD_STACK_SIZE); + struct k_sem gpio_sem; + struct k_thread thread; +#elif defined(CONFIG_PMW33XX_TRIGGER_GLOBAL_THREAD) + struct k_work work; +#endif + +#endif /* CONFIG_PMW33XX_TRIGGER */ +}; + +int pmw33xx_spi_init(const struct device *dev); +#ifdef CONFIG_PMW33XX_TRIGGER + +int pmw33xx_trigger_set(const struct device *dev, const struct sensor_trigger *trig, + sensor_trigger_handler_t handler); + +int pmw33xx_init_interrupt(const struct device *dev); + +void pmw33xx_reset_motion(const struct device *dev); +#endif + +#endif /* ZEPHYR_DRIVERS_SENSOR_PIXART_PMW33XX_H_ */ diff --git a/app/drivers/sensor/pmw33xx/pmw33xx_trigger.c b/app/drivers/sensor/pmw33xx/pmw33xx_trigger.c new file mode 100644 index 00000000..e254faf1 --- /dev/null +++ b/app/drivers/sensor/pmw33xx/pmw33xx_trigger.c @@ -0,0 +1,127 @@ +/* + * Copyright (c) 2022 The ZMK Contributors + * + * SPDX-License-Identifier: MIT + */ + +#define DT_DRV_COMPAT pixart_pmw33xx + +#include +#include +#include +#include +#include + +#include "pmw33xx.h" + +// extern struct pmw33xx_data pmw33xx_driver; + +#include +LOG_MODULE_DECLARE(PMW33XX, CONFIG_SENSOR_LOG_LEVEL); + +static inline void setup_int(const struct device *dev, bool enable) { + struct pmw33xx_data *data = dev->data; + const struct pmw33xx_config *cfg = dev->config; + + gpio_pin_configure(cfg->motswk_spec.port, cfg->motswk_spec.pin, cfg->motswk_spec.dt_flags); + if (gpio_pin_interrupt_configure(cfg->motswk_spec.port, cfg->motswk_spec.pin, + enable ? GPIO_INT_EDGE_TO_ACTIVE : GPIO_INT_DISABLE)) { + LOG_WRN("Unable to set MOTSWK GPIO interrupt"); + } +} + +static void pmw33xx_motswk_gpio_callback(const struct device *dev, struct gpio_callback *cb, + uint32_t pins) { + struct pmw33xx_data *drv_data = CONTAINER_OF(cb, struct pmw33xx_data, motswk_gpio_cb); + + LOG_DBG(""); + + setup_int(drv_data->dev, false); + +#if defined(CONFIG_PMW33XX_TRIGGER_OWN_THREAD) + k_sem_give(&drv_data->gpio_sem); +#elif defined(CONFIG_PMW33XX_TRIGGER_GLOBAL_THREAD) + k_work_submit(&drv_data->work); +#endif +} + +static void pmw33xx_thread_cb(const struct device *dev) { + struct pmw33xx_data *drv_data = dev->data; + + LOG_DBG("%p", drv_data->handler); + drv_data->handler(dev, drv_data->trigger); + + // Enable once the wall/spam of interrupts is solved + setup_int(dev, true); +} + +#ifdef CONFIG_PMW33XX_TRIGGER_OWN_THREAD +static void pmw33xx_thread(int dev_ptr, int unused) { + const struct device *dev = INT_TO_POINTER(dev_ptr); + struct pmw33xx_data *drv_data = dev->data; + + ARG_UNUSED(unused); + + while (1) { + k_sem_take(&drv_data->gpio_sem, K_FOREVER); + pmw33xx_thread_cb(dev); + } +} +#endif + +#ifdef CONFIG_PMW33XX_TRIGGER_GLOBAL_THREAD +static void pmw33xx_work_cb(struct k_work *work) { + struct pmw33xx_data *drv_data = CONTAINER_OF(work, struct pmw33xx_data, work); + + LOG_DBG(" "); + + pmw33xx_thread_cb(drv_data->dev); +} +#endif + +int pmw33xx_trigger_set(const struct device *dev, const struct sensor_trigger *trig, + sensor_trigger_handler_t handler) { + struct pmw33xx_data *drv_data = dev->data; + + setup_int(dev, false); + + k_msleep(5); + + drv_data->trigger = trig; + drv_data->handler = handler; + + setup_int(dev, true); + + // reset motion on int setup + pmw33xx_reset_motion(dev); + return 0; +} + +int pmw33xx_init_interrupt(const struct device *dev) { + struct pmw33xx_data *drv_data = dev->data; + const struct pmw33xx_config *drv_cfg = dev->config; + + drv_data->dev = dev; + /* setup gpio interrupt */ + + gpio_init_callback(&drv_data->motswk_gpio_cb, pmw33xx_motswk_gpio_callback, + BIT(drv_cfg->motswk_spec.pin)); + + int err = gpio_add_callback(drv_cfg->motswk_spec.port, &drv_data->motswk_gpio_cb); + if (err < 0) { + LOG_DBG("Failed to set MOTSWK callback!"); + return -EIO; + } + +#if defined(CONFIG_PMW33XX_TRIGGER_OWN_THREAD) + k_sem_init(&drv_data->gpio_sem, 0, UINT_MAX); + + k_thread_create(&drv_data->thread, drv_data->thread_stack, CONFIG_PMW33XX_THREAD_STACK_SIZE, + (k_thread_entry_t)pmw33xx_thread, dev, 0, NULL, + K_PRIO_COOP(CONFIG_PMW33XX_THREAD_PRIORITY), 0, K_NO_WAIT); +#elif defined(CONFIG_PMW33XX_TRIGGER_GLOBAL_THREAD) + k_work_init(&drv_data->work, pmw33xx_work_cb); +#endif + + return 0; +} \ No newline at end of file diff --git a/app/drivers/zephyr/dts/bindings/sensor/pixart,pmw33xx.yaml b/app/drivers/zephyr/dts/bindings/sensor/pixart,pmw33xx.yaml new file mode 100644 index 00000000..6a45218a --- /dev/null +++ b/app/drivers/zephyr/dts/bindings/sensor/pixart,pmw33xx.yaml @@ -0,0 +1,28 @@ +# Copyright (c) 2022 The ZMK Contributors +# SPDX-License-Identifier: MIT +description: | + Sensor driver for the pixart PMW33XX optical mouse sensor supports 3360 built in, and 3389 with external srom +compatible: "pixart,pmw33xx" + +include: spi-device.yaml + +properties: + label: + type: string + required: true + cs-gpios: + type: phandle-array + required: true + description: chip select pin for the sensor + motswk-gpios: + type: phandle-array + required: false + description: interrupt pin for motion + cpi: + type: int + description: mouse cpi + required: false + disable-rest: + type: boolean + description: disables mouse rest mode, will decrease battery life + required: false