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Initial commit of Preonic rev3 board definition. Awaiting ticket #202 before it can be tested.

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This commit is contained in:
Jason Chestnut 2020-09-23 15:45:54 -04:00 • committed by Jason Chestnut
parent cfc75a118e
commit a8fb772281
9 changed files with 271 additions and 0 deletions
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9
app/boards/arm/preonic/CMakeLists.txt Normal file
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# SPDX-License-Identifier: MIT
list(APPEND EXTRA_DTC_FLAGS "-qq")
if(CONFIG_PINMUX)
zephyr_library()
zephyr_library_sources(pinmux.c)
zephyr_library_include_directories(${ZEPHYR_BASE}/drivers)
endif()

8
app/boards/arm/preonic/Kconfig.board Normal file
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# Preonic V3 board configuration
# Copyright (c) 2020 The ZMK Contributors
# SPDX-License-Identifier: MIT
config BOARD_PREONIC_REV3
bool "Preonic V3 Keyboard"
depends on SOC_STM32F303XC

14
app/boards/arm/preonic/Kconfig.defconfig Normal file
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# Preonic keyboard configuration
# Copyright (c) 2020 The ZMK Contributors
# SPDX-License-Identifier: MIT
if BOARD_PREONIC_REV3
config ZMK_KEYBOARD_NAME
default "Preonic V3"
config ZMK_USB
default y
endif # BOARD_PREONIC_REV3

7
app/boards/arm/preonic/board.cmake Normal file
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# SPDX-License-Identifier: MIT
board_runner_args(dfu-util "--pid=0483:df11" "--alt=0" "--dfuse")
board_runner_args(jlink "--device=STM32F303VC" "--speed=4000")
include(${ZEPHYR_BASE}/boards/common/dfu-util.board.cmake)
include(${ZEPHYR_BASE}/boards/common/jlink.board.cmake)

67
app/boards/arm/preonic/pinmux.c Normal file
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/*
* Copyright (c) 2017 I-SENSE group of ICCS
*
* SPDX-License-Identifier: MIT
*/
#include <kernel.h>
#include <device.h>
#include <init.h>
#include <drivers/pinmux.h>
#include <sys/sys_io.h>
#include <pinmux/stm32/pinmux_stm32.h>
/* pin assignments for STM32F3DISCOVERY board */
static const struct pin_config pinconf[] = {
#ifdef CONFIG_UART_1
{STM32_PIN_PC4, STM32F3_PINMUX_FUNC_PC4_USART1_TX},
{STM32_PIN_PC5, STM32F3_PINMUX_FUNC_PC5_USART1_RX},
#endif /* CONFIG_UART_1 */
#ifdef CONFIG_UART_2
{STM32_PIN_PA2, STM32F3_PINMUX_FUNC_PA2_USART2_TX},
{STM32_PIN_PA3, STM32F3_PINMUX_FUNC_PA3_USART2_RX},
#endif /* CONFIG_UART_2 */
#ifdef CONFIG_I2C_1
{STM32_PIN_PB6, STM32F3_PINMUX_FUNC_PB6_I2C1_SCL},
{STM32_PIN_PB7, STM32F3_PINMUX_FUNC_PB7_I2C1_SDA},
#endif /* CONFIG_I2C_1 */
#ifdef CONFIG_I2C_2
{STM32_PIN_PA9, STM32F3_PINMUX_FUNC_PA9_I2C2_SCL},
{STM32_PIN_PA10, STM32F3_PINMUX_FUNC_PA10_I2C2_SDA},
#endif /* CONFIG_I2C_2 */
#ifdef CONFIG_SPI_1
#ifdef CONFIG_SPI_STM32_USE_HW_SS
{STM32_PIN_PA4, STM32F3_PINMUX_FUNC_PA4_SPI1_NSS},
#endif /* CONFIG_SPI_STM32_USE_HW_SS */
{STM32_PIN_PA5, STM32F3_PINMUX_FUNC_PA5_SPI1_SCK},
{STM32_PIN_PA6, STM32F3_PINMUX_FUNC_PA6_SPI1_MISO},
{STM32_PIN_PA7, STM32F3_PINMUX_FUNC_PA7_SPI1_MOSI},
#endif /* CONFIG_SPI_1 */
#ifdef CONFIG_SPI_2
#ifdef CONFIG_SPI_STM32_USE_HW_SS
{STM32_PIN_PB12, STM32F3_PINMUX_FUNC_PB12_SPI2_NSS},
#endif /* CONFIG_SPI_STM32_USE_HW_SS */
{STM32_PIN_PB13, STM32F3_PINMUX_FUNC_PB13_SPI2_SCK},
{STM32_PIN_PB14, STM32F3_PINMUX_FUNC_PB14_SPI2_MISO},
{STM32_PIN_PB15, STM32F3_PINMUX_FUNC_PB15_SPI2_MOSI},
#endif /* CONFIG_SPI_2 */
#ifdef CONFIG_USB_DC_STM32
{STM32_PIN_PA11, STM32F3_PINMUX_FUNC_PA11_USB_DM},
{STM32_PIN_PA12, STM32F3_PINMUX_FUNC_PA12_USB_DP},
#endif /* CONFIG_USB_DC_STM32 */
#ifdef CONFIG_CAN_1
{STM32_PIN_PD0, STM32F3_PINMUX_FUNC_PD0_CAN1_RX},
{STM32_PIN_PD1, STM32F3_PINMUX_FUNC_PD1_CAN1_TX},
#endif /* CONFIG_CAN_1 */
};
static int pinmux_stm32_init(struct device *port) {
ARG_UNUSED(port);
stm32_setup_pins(pinconf, ARRAY_SIZE(pinconf));
return 0;
}
SYS_INIT(pinmux_stm32_init, PRE_KERNEL_1, CONFIG_PINMUX_STM32_DEVICE_INITIALIZATION_PRIORITY);

96
app/boards/arm/preonic/preonic_rev3.dts Normal file
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/*
* Copyright (c) 2017 I-SENSE group of ICCS
*
* SPDX-License-Identifier: MIT
*/
/dts-v1/;
#include <st/f3/stm32f303Xc.dtsi>
#include <dt-bindings/zmk/matrix-transform.h>
/ {
model = "Preonic PCD, rev3";
compatible = "preonic,rev3", "st,stm32f303";
chosen {
zephyr,sram = &sram0;
zephyr,flash = &flash0;
zmk,kscan = &kscan0;
zmk,matrix_transform = &my_transform;
};
default_transform: keymap_transform_0 {
compatible = "zmk,matrix-transform";
columns = <6>;
rows = <10>;
map = <
RC(0,0) RC(0,1) RC(0,2) RC(0,3) RC(0,4) RC(0,5) RC(4,0) RC(4,1) RC(4,2) RC(4,3) RC(4,4) RC(4,5)
RC(1,0) RC(1,1) RC(1,2) RC(1,3) RC(1,4) RC(1,5) RC(5,0) RC(5,1) RC(5,2) RC(5,3) RC(5,4) RC(5,5)
RC(2,0) RC(2,1) RC(2,2) RC(2,3) RC(2,4) RC(2,5) RC(6,0) RC(6,1) RC(6,2) RC(6,3) RC(6,4) RC(6,5)
RC(3,0) RC(3,1) RC(3,2) RC(3,3) RC(3,4) RC(3,5) RC(7,0) RC(7,1) RC(7,2) RC(7,3) RC(7,4) RC(7,5)
RC(8,0) RC(8,1) RC(8,2) RC(9,3) RC(9,4) RC(9,5) RC(9,0) RC(9,1) RC(9,2) RC(8,3) RC(8,4) RC(8,5)
>;
};
my_transform: keymap_transform_0 {
compatible = "zmk,matrix-transform";
columns = <6>;
rows = <10>;
map = <
RC(0,0) RC(0,1) RC(0,2) RC(0,3) RC(0,4) RC(0,5) RC(7,0) RC(7,1) RC(7,2) RC(7,3) RC(7,4) RC(7,5)
RC(2,0) RC(2,1) RC(2,2) RC(2,3) RC(2,4) RC(2,5) RC(3,0) RC(3,1) RC(3,2) RC(3,3) RC(3,4) RC(3,5)
RC(4,0) RC(4,1) RC(4,2) RC(4,3) RC(4,4) RC(4,5) RC(5,0) RC(5,1) RC(5,2) RC(5,3) RC(5,4) RC(5,5)
RC(6,0) RC(6,1) RC(6,2) RC(6,3) RC(6,4) RC(6,5) RC(1,0) RC(1,1) RC(1,2) RC(1,3) RC(1,4) RC(1,5)
RC(8,0) RC(8,1) RC(8,2) RC(9,3) RC(9,4) RC(9,5) RC(9,0) RC(9,1) RC(9,2) RC(8,3) RC(8,4) RC(8,5)
>;
};
kscan0: kscan_0 {
compatible = "zmk,kscan-gpio-matrix";
label = "KSCAN";
diode-direction = "col2row";
row-gpios
= <&gpioa 10 (GPIO_ACTIVE_HIGH | GPIO_PULL_DOWN)>
, <&gpiob 15 (GPIO_ACTIVE_HIGH | GPIO_PULL_DOWN)>
, <&gpioa 9 (GPIO_ACTIVE_HIGH | GPIO_PULL_DOWN)>
, <&gpioa 2 (GPIO_ACTIVE_HIGH | GPIO_PULL_DOWN)>
, <&gpioa 8 (GPIO_ACTIVE_HIGH | GPIO_PULL_DOWN)>
, <&gpioa 6 (GPIO_ACTIVE_HIGH | GPIO_PULL_DOWN)>
, <&gpioc 13 (GPIO_ACTIVE_HIGH | GPIO_PULL_DOWN)>
, <&gpioc 14 (GPIO_ACTIVE_HIGH | GPIO_PULL_DOWN)>
, <&gpioc 15 (GPIO_ACTIVE_HIGH | GPIO_PULL_DOWN)>
, <&gpioa 3 (GPIO_ACTIVE_HIGH | GPIO_PULL_DOWN)>
;
col-gpios
= <&gpiob 11 GPIO_ACTIVE_HIGH>
, <&gpiob 10 GPIO_ACTIVE_HIGH>
, <&gpiob 2 GPIO_ACTIVE_HIGH>
, <&gpiob 1 GPIO_ACTIVE_HIGH>
, <&gpioa 7 GPIO_ACTIVE_HIGH>
, <&gpiob 0 GPIO_ACTIVE_HIGH>
;
};
};
&usb {
status = "okay";
};
&flash0 {
/*
* For more information, see:
* http://docs.zephyrproject.org/latest/guides/dts/index.html#flash-partitions
*/
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
/* Set 6Kb of storage at the end of the 256Kb of flash */
storage_partition: partition@3e800 {
label = "storage";
reg = <0x0003e800 0x00001800>;
};
};
};

23
app/boards/arm/preonic/preonic_rev3.keymap Normal file
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#include <behaviors.dtsi>
#include <dt-bindings/zmk/keys.h>
/ {
keymap {
compatible = "zmk,keymap";
default_layer {
// -----------------------------------------------------------------------------------------
// | TAB | Q | W | E | R | T | Y | U | I | O | P | BSPC |
// | ESC | A | S | D | F | G | H | J | K | L | ; | ' |
// | SHIFT | Z | X | C | V | B | N | M | , | . | / | RET |
// | FN | LGUI | LALT | LCTL | LOWR | SPACE | RAIS | LARW | DARW | UARW | RARW |
bindings = <
&kp TAB &kp NUM_1 &kp NUM_2 &kp NUM_3 &kp NUM_4 &kp NUM_5 &kp NUM_6 &kp NUM_7 &kp NUM_8 &kp NUM_9 &kp NUM_0 &kp DEL
&kp TAB &kp Q &kp W &kp E &kp R &kp T &kp Y &kp U &kp I &kp O &kp P &kp DEL
&kp ESC &kp A &kp S &kp D &kp F &kp G &kp H &kp J &kp K &kp L &kp SCLN &kp QUOT
&kp LSFT &kp Z &kp X &kp C &kp V &kp B &kp N &kp M &kp CMMA &kp DOT &kp BSLH &kp RET
&trans &kp LGUI &kp LALT &kp LCTL &trans &trans &kp SPC &trans &kp LARW &kp DARW &kp UARW &kp RARW
>;
};
};
};

19
app/boards/arm/preonic/preonic_rev3.yaml Normal file
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identifier: preonic_rev3
name: PREONICREV3
type: keyboard
arch: arm
toolchain:
- zephyr
- gnuarmemb
- xtools
ram: 40
supported:
- gpio
- i2c
- counter
- spi
- usb_device
- lsm303dlhc
- nvs
- can
- kscan

28
app/boards/arm/preonic/preonic_rev3_defconfig Normal file
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# SPDX-License-Identifier: MIT
CONFIG_SOC_SERIES_STM32F3X=y
CONFIG_SOC_STM32F303XC=y
# 72MHz system clock
CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=72000000
# enable pinmux
CONFIG_PINMUX=y
# enable GPIO
CONFIG_GPIO=y
# clock configuration
CONFIG_CLOCK_CONTROL=y
# Clock configuration for Cube Clock control driver
CONFIG_CLOCK_STM32_HSE_CLOCK=8000000
CONFIG_CLOCK_STM32_SYSCLK_SRC_PLL=y
# use HSE as PLL input
CONFIG_CLOCK_STM32_PLL_SRC_HSE=y
# produce 72MHz clock at PLL output
CONFIG_CLOCK_STM32_PLL_PREDIV=1
CONFIG_CLOCK_STM32_PLL_MULTIPLIER=9
CONFIG_CLOCK_STM32_AHB_PRESCALER=1
CONFIG_CLOCK_STM32_APB1_PRESCALER=2
CONFIG_CLOCK_STM32_APB2_PRESCALER=1