From 7eac1fe2e5026124e6085bbb47ec0a7885c1c616 Mon Sep 17 00:00:00 2001 From: Stefan Sundin Date: Thu, 5 Nov 2020 17:19:13 +0100 Subject: [PATCH] started adding cyber60 --- app/boards/arm/cyber60/Kconfig.board | 9 ++ app/boards/arm/cyber60/Kconfig.defconfig | 31 ++++++ app/boards/arm/cyber60/board.cmake | 5 + app/boards/arm/cyber60/cyber60.dts | 115 +++++++++++++++++++++++ app/boards/arm/cyber60/cyber60.keymap | 25 +++++ app/boards/arm/cyber60/cyber60_defconfig | 20 ++++ 6 files changed, 205 insertions(+) create mode 100644 app/boards/arm/cyber60/Kconfig.board create mode 100644 app/boards/arm/cyber60/Kconfig.defconfig create mode 100644 app/boards/arm/cyber60/board.cmake create mode 100644 app/boards/arm/cyber60/cyber60.dts create mode 100644 app/boards/arm/cyber60/cyber60.keymap create mode 100644 app/boards/arm/cyber60/cyber60_defconfig diff --git a/app/boards/arm/cyber60/Kconfig.board b/app/boards/arm/cyber60/Kconfig.board new file mode 100644 index 00000000..83344f2e --- /dev/null +++ b/app/boards/arm/cyber60/Kconfig.board @@ -0,0 +1,9 @@ +# cyber60 board configuration + +# Copyright (c) 2020 Stefan Sundin (4pplet) +# SPDX-License-Identifier: MIT + +config BOARD_CYBER60_A + bool "cyber60 Rev A" + depends on SOC_NRF52840_QIAA + diff --git a/app/boards/arm/cyber60/Kconfig.defconfig b/app/boards/arm/cyber60/Kconfig.defconfig new file mode 100644 index 00000000..5ced61c4 --- /dev/null +++ b/app/boards/arm/cyber60/Kconfig.defconfig @@ -0,0 +1,31 @@ +# Copyright (c) 2020 Stefan Sundin (4pplet) +# SPDX-License-Identifier: MIT + +if BOARD_CYBER60 + +config BOARD + default "cyber60" + +if USB + +config USB_NRFX + default y + +config USB_DEVICE_STACK + default y + +endif # USB + +config BT_CTLR + default BT + +config ZMK_BLE + default y + +config ZMK_USB + default y + +config ZMK_BATTERY_VOLTAGE_DIVIDER + default y + +endif # BOARD_CYBER60 diff --git a/app/boards/arm/cyber60/board.cmake b/app/boards/arm/cyber60/board.cmake new file mode 100644 index 00000000..fa847d50 --- /dev/null +++ b/app/boards/arm/cyber60/board.cmake @@ -0,0 +1,5 @@ +# SPDX-License-Identifier: MIT + +board_runner_args(nrfjprog "--nrf-family=NRF52" "--softreset") +include(${ZEPHYR_BASE}/boards/common/blackmagicprobe.board.cmake) +include(${ZEPHYR_BASE}/boards/common/nrfjprog.board.cmake) diff --git a/app/boards/arm/cyber60/cyber60.dts b/app/boards/arm/cyber60/cyber60.dts new file mode 100644 index 00000000..8474a23b --- /dev/null +++ b/app/boards/arm/cyber60/cyber60.dts @@ -0,0 +1,115 @@ +/* + * Copyright (c) 2020 Stefan Sundin (4pplet) + * + * SPDX-License-Identifier: MIT + */ + +/dts-v1/; +#include + +/ { + model = "CYBER60_A"; + compatible = "cyber60,A"; + + chosen { + zephyr,code-partition = &code_partition; + // zephyr,console = &uart0; + //zephyr,bt-mon-uart = &uart0; + //zephyr,bt-c2h-uart = &uart0; + zephyr,sram = &sram0; + zephyr,flash = &flash0; + }; + + leds { + compatible = "gpio-leds"; + red_led: led_0 { + gpios = <&gpio0 42 GPIO_ACTIVE_HIGH>; + label = "Red LED"; + }; + green_led: led_1 { + gpios = <&gpio0 42 GPIO_ACTIVE_HIGH>; + label = "Green LED"; + }; + blue_led: led_2 { + gpios = <&gpio0 42 GPIO_ACTIVE_HIGH>; + label = "Blue LED"; + }; + }; + + vbatt { + compatible = "zmk,battery-voltage-divider"; + label = "BATTERY"; + io-channels = <&adc 7>; + output-ohms = <2000000>; + full-ohms = <(2000000 + 806000)>; + }; + +}; + +&adc { + status = "okay"; +}; + +&gpio0 { + status = "okay"; +}; + +&gpio1 { + status = "okay"; +}; + +&i2c0 { + compatible = "nordic,nrf-twi"; + sda-pin = <15>; + scl-pin = <17>; +}; + +&uart0 { + compatible = "nordic,nrf-uarte"; + status = "okay"; + current-speed = <115200>; + tx-pin = <39>; + rx-pin = <34>; + rts-pin = <33>; + cts-pin = <12>; +}; + +&usbd { + status = "okay"; +}; + + +&flash0 { + /* + * For more information, see: + * http://docs.zephyrproject.org/latest/devices/dts/flash_partitions.html + */ + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + boot_partition: partition@0 { + label = "adafruit_boot"; + reg = <0x000000000 0x0000C000>; + }; + code_partition: partition@26000 { + label = "code_partition"; + reg = <0x00026000 0x000d2000>; + }; + + /* + * The flash starting at 0x000f8000 and ending at + * 0x000fffff is reserved for use by the application. + */ + + /* + * Storage partition will be used by FCB/LittleFS/NVS + * if enabled. + */ + storage_partition: partition@f8000 { + label = "storage"; + reg = <0x000f8000 0x00008000>; + }; + }; +}; diff --git a/app/boards/arm/cyber60/cyber60.keymap b/app/boards/arm/cyber60/cyber60.keymap new file mode 100644 index 00000000..8de01c17 --- /dev/null +++ b/app/boards/arm/cyber60/cyber60.keymap @@ -0,0 +1,25 @@ +#include +#include + +/ { + keymap { + compatible = "zmk,keymap"; + + default_layer { +// ------------------------------------------------------------------------------------------ +// | ESC | 1 | 2 | 3 | 4 | 5 | 6 | 7 | 8 | 9 | 0 | - | = | BKSP | +// | TAB | Q | W | E | R | T | Y | U | I | O | P | [ | ] | "|" | +// | CAPS | A | S | D | F | G | H | J | K | L | ; | ' | ENTER | +// | SHIFT | Z | X | C | V | B | N | M | , | . | SHIFT(/) | ^ | DEL | +// | CTL | WIN | ALT | SPACE | ALT | MO(1) | <- | v | -> | +// ------------------------------------------------------------------------------------------ + bindings = < + &kp ESC &kp NUM_1 &kp NUM_2 &kp NUM_3 &kp NUM_4 &kp NUM_5 &kp NUM_6 &kp NUM_7 &kp NUM_8 &kp NUM_9 &kp NUM_0 &kp MINUS &kp EQL &kp BKSP + &kp TAB &kp Q &kp W &kp E &kp R &kp T &kp Y &kp U &kp I &kp O &kp P &kp LBKT &kp RBKT &kp BSLH + &kp CLCK &kp A &kp S &kp D &kp F &kp G &kp H &kp J &kp K &kp L &kp SCLN &kp QUOT &kp RET + &kp LSFT &kp Z &kp X &kp C &kp V &kp B &kp N &kp M &kp CMMA &kp DOT &mt MOD_RSFT FSLH &kp UARW &kp DEL + &kp LCTL &kp LGUI &kp LALT &kp SPC &kp RALT &mo 1 &kp LARW &kp DARW &kp RARW + >; + }; + }; +}; \ No newline at end of file diff --git a/app/boards/arm/cyber60/cyber60_defconfig b/app/boards/arm/cyber60/cyber60_defconfig new file mode 100644 index 00000000..393d61fe --- /dev/null +++ b/app/boards/arm/cyber60/cyber60_defconfig @@ -0,0 +1,20 @@ +# SPDX-License-Identifier: MIT + +CONFIG_SOC_SERIES_NRF52X=y +CONFIG_SOC_NRF52840_QIAA=y +CONFIG_BOARD_NICE_NANO=y + +# Enable MPU +CONFIG_ARM_MPU=y + +# enable GPIO +CONFIG_GPIO=y + +CONFIG_USE_DT_CODE_PARTITION=y + +CONFIG_MPU_ALLOW_FLASH_WRITE=y +CONFIG_NVS=y +CONFIG_SETTINGS_NVS=y +CONFIG_FLASH=y +CONFIG_FLASH_PAGE_LAYOUT=y +CONFIG_FLASH_MAP=y \ No newline at end of file