Add Waveshare RP2040 Zero

app/boards/arm/waveshare_rp2040_zero/Kconfig.board

@@ -0,0 +1,6 @@
+# Copyright (c) 2023 The ZMK Contributors
+# SPDX-License-Identifier: Apache-2.0
+
+config BOARD_WAVESHARE_RP2040_ZERO
+	bool "Waveshare RP2040 Zero Board"
+	depends on SOC_RP2040

app/boards/arm/waveshare_rp2040_zero/Kconfig.defconfig

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+# Copyright (c) 2023 The ZMK Contributors
+# SPDX-License-Identifier: Apache-2.0
+
+if BOARD_WAVESHARE_RP2040_ZERO
+
+config BOARD
+	default "waveshare_rp2040_zero"
+
+config RP2_FLASH_W25Q080
+	default y
+
+config ZMK_USB
+	default y
+
+endif # BOARD_WAVESHARE_RP2040_ZERO

app/boards/arm/waveshare_rp2040_zero/waveshare_rp2040_zero-pinctrl.dtsi

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+/*
+ * Copyright (c) 2023 The ZMK Contributors
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include <dt-bindings/pinctrl/rpi-pico-rp2040-pinctrl.h>
+
+&pinctrl {
+	uart1_default: uart0_default {
+		group1 {
+			pinmux = <UART1_TX_P20>;
+		};
+		group2 {
+			pinmux = <UART1_RX_P5>;
+			input-enable;
+		};
+	};
+
+	i2c1_default: i2c1_default {
+		group1 {
+			pinmux = <I2C1_SDA_P22>, <I2C1_SCL_P23>;
+			input-enable;
+			input-schmitt-enable;
+		};
+	};
+
+
+	spi0_default: spi0_default {
+		group1 {
+			pinmux = <SPI0_TX_P3>, <SPI0_SCK_P6>;
+		};
+		group2 {
+			pinmux = <SPI0_RX_P4>;
+			input-enable;
+		};
+	};
+};

app/boards/arm/waveshare_rp2040_zero/waveshare_rp2040_zero.dts

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+/*
+ * Copyright (c) 2023 The ZMK Contributors
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+/dts-v1/;
+
+#include <rpi_pico/rp2040.dtsi>
+#include "waveshare_rp2040_zero-pinctrl.dtsi"
+#include <freq.h>
+
+/ {
+	chosen {
+		zephyr,sram = &sram0;
+		zephyr,flash = &flash0;
+		zephyr,console = &uart0;
+		zephyr,code-partition = &code_partition;
+	};
+};
+
+&flash0 {
+	/* 2MB of flash minus the 0x100 used for
+	 * the second stage bootloader
+	 */
+	reg = <0x10000000 DT_SIZE_M(2)>;
+
+	partitions {
+		compatible = "fixed-partitions";
+		#address-cells = <1>;
+		#size-cells = <1>;
+
+		/*
+		 * Start at the beginning of usable flash, 8MB minus the
+		 * second stage space and the 16 KiB reserved for settings
+		 */
+		code_partition: partition@100 {
+			label = "code";
+			reg = <0x100 (DT_SIZE_M(2) - DT_SIZE_K(16))>;
+			read-only;
+		};
+
+		/*
+		 * The final 16 KiB is reserved for the application.
+		 * Storage partition may be used by FCB or LittleFS.
+		 */
+		storage_partition: partition@7fbe00 {
+			label = "storage";
+			reg = <0x007fbe00 DT_SIZE_K(16)>;
+		};
+	};
+};
+
+&uart1 {
+	current-speed = <115200>;
+	status = "okay";
+	pinctrl-0 = <&uart1_default>;
+	pinctrl-names = "default";
+};
+
+&spi0 {
+	status = "okay";
+	pinctrl-0 = <&spi0_default>;
+	pinctrl-names = "default";
+	clock-frequency = <DT_FREQ_M(2)>;
+};
+
+&i2c1 {
+	status = "okay";
+	pinctrl-0 = <&i2c1_default>;
+	pinctrl-names = "default";
+	clock-frequency = <I2C_BITRATE_FAST>;
+};
+
+&gpio0 {
+	status = "okay";
+};
+
+zephyr_udc0: &usbd {
+	status = "okay";
+};

app/boards/arm/waveshare_rp2040_zero/waveshare_rp2040_zero.yaml

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+identifier: waveshare_rp2040_zero
+name: RP2040-Zero
+type: mcu
+arch: arm
+flash: 2048
+ram: 264
+toolchain:
+  - zephyr
+  - gnuarmemb
+  - xtools
+supported:
+  - serial

app/boards/arm/waveshare_rp2040_zero/waveshare_rp2040_zero_defconfig

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+# SPDX-License-Identifier: Apache-2.0
+
+CONFIG_SOC_SERIES_RP2XXX=y
+CONFIG_SOC_RP2040=y
+CONFIG_BOARD_WAVESHARE_RP2040_ZERO=y
+
+CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=240000000
+
+# Enable GPIO
+CONFIG_GPIO=y
+
+# enable uart driver
+CONFIG_SERIAL=n
+
+# enable console
+CONFIG_CONSOLE=y
+CONFIG_UART_CONSOLE=y
+
+# Code partition needed to target the correct flash range
+CONFIG_USE_DT_CODE_PARTITION=y
+
+# Output UF2 by default, native bootloader supports it.
+CONFIG_BUILD_OUTPUT_UF2=y