diff --git a/app/boards/arm/choconum/Kconfig.board b/app/boards/arm/choconum/Kconfig.board new file mode 100644 index 00000000..75ea9a12 --- /dev/null +++ b/app/boards/arm/choconum/Kconfig.board @@ -0,0 +1,8 @@ +# keeb.io Choconum board configuration + +# Copyright (c) 2020 The ZMK Contributors +# SPDX-License-Identifier: MIT + +config BOARD_CHOCONUM + bool "Choconum" + depends on SOC_STM32F072XB diff --git a/app/boards/arm/choconum/Kconfig.defconfig b/app/boards/arm/choconum/Kconfig.defconfig new file mode 100644 index 00000000..70220319 --- /dev/null +++ b/app/boards/arm/choconum/Kconfig.defconfig @@ -0,0 +1,17 @@ +# keeb.io Choconum board configuration + +# Copyright (c) 2020 Pete Johanson +# SPDX-License-Identifier: MIT + +if BOARD_CHOCONUM + +config BOARD + default "choconum" + +config ZMK_KEYBOARD_NAME + default "Choconum" + +config ZMK_USB + default y + +endif # BOARD_CHOCONUM diff --git a/app/boards/arm/choconum/README.md b/app/boards/arm/choconum/README.md new file mode 100644 index 00000000..025c07cb --- /dev/null +++ b/app/boards/arm/choconum/README.md @@ -0,0 +1,16 @@ +# Building ZMK for the Choconum + +Some general notes/commands for building standard Choconum layouts from the assembly documentation. + +## Standard Build + +``` +west build -p -d build/choconum --board choconum +``` + +## Flashing + +``` +west flash -d build/choconum +``` + diff --git a/app/boards/arm/choconum/board.cmake b/app/boards/arm/choconum/board.cmake new file mode 100644 index 00000000..4f430e12 --- /dev/null +++ b/app/boards/arm/choconum/board.cmake @@ -0,0 +1,7 @@ +# SPDX-License-Identifier: MIT + +board_runner_args(dfu-util "--pid=0483:df11" "--alt=0" "--dfuse") +board_runner_args(jlink "--device=STM32F072CB" "--speed=4000") + +include(${ZEPHYR_BASE}/boards/common/dfu-util.board.cmake) +include(${ZEPHYR_BASE}/boards/common/jlink.board.cmake) diff --git a/app/boards/arm/choconum/choconum.dts b/app/boards/arm/choconum/choconum.dts new file mode 100644 index 00000000..7db2ee2f --- /dev/null +++ b/app/boards/arm/choconum/choconum.dts @@ -0,0 +1,43 @@ +/* + * Copyright (c) 2021 The ZMK Contributors + * + * SPDX-License-Identifier: MIT + */ + +#include "choconum_base.dtsi" + +/ { + chosen { + zmk,kscan = &kscan; + }; + + kscan: kscan { + compatible = "zmk,kscan-gpio-direct"; + label = "KSCAN"; + + input-gpios + = <&gpiob 2 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)> + , <&gpiob 10 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)> + , <&gpiob 3 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)> + , <&gpiob 4 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)> + + , <&gpiob 1 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)> + , <&gpiob 11 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)> + , <&gpioa 15 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)> + , <&gpiob 5 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)> + + , <&gpiob 0 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)> + , <&gpioa 4 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)> + , <&gpiob 7 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)> + + , <&gpioa 7 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)> + , <&gpioa 5 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)> + , <&gpiob 8 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)> + , <&gpiob 6 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)> + + , <&gpioa 4 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)> + , <&gpiob 9 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)> + ; + }; + +}; diff --git a/app/boards/arm/choconum/choconum.keymap b/app/boards/arm/choconum/choconum.keymap new file mode 100644 index 00000000..f031182f --- /dev/null +++ b/app/boards/arm/choconum/choconum.keymap @@ -0,0 +1,26 @@ +/* + * Copyright (c) 2020 The ZMK Contributors + * + * SPDX-License-Identifier: MIT + */ + +#include +#include + + +/ { + keymap { + compatible = "zmk,keymap"; + + default_layer { + bindings = < +&kp KP_NUMLOCK &kp KP_DIVIDE &kp KP_MULTIPLY &kp KP_MINUS +&kp KP_N7 &kp KP_N8 &kp KP_N9 &kp KP_PLUS +&kp KP_N4 &kp KP_N5 &kp KP_N6 +&kp KP_N1 &kp KP_N2 &kp KP_N3 &kp KP_ENTER +&kp KP_N0 &kp KP_DOT + >; + }; + }; +}; + diff --git a/app/boards/arm/choconum/choconum.yaml b/app/boards/arm/choconum/choconum.yaml new file mode 100644 index 00000000..cba1e16f --- /dev/null +++ b/app/boards/arm/choconum/choconum.yaml @@ -0,0 +1,14 @@ +identifier: choconum +name: keeb.io Choconum +type: mcu +arch: arm +toolchain: + - zephyr + - gnuarmemb + - xtools +ram: 40 +supported: + - encoders + - switches + - underglow + - per_key diff --git a/app/boards/arm/choconum/choconum.zmk.yml b/app/boards/arm/choconum/choconum.zmk.yml new file mode 100644 index 00000000..67cbc766 --- /dev/null +++ b/app/boards/arm/choconum/choconum.zmk.yml @@ -0,0 +1,10 @@ +file_format: "1" +id: choconum +name: Choconum +type: board +arch: arm +features: + - keys +outputs: + - usb +url: https://keeb.io/products/choconum-kailh-choc-numpad diff --git a/app/boards/arm/choconum/choconum_base.dtsi b/app/boards/arm/choconum/choconum_base.dtsi new file mode 100644 index 00000000..c3a4eca6 --- /dev/null +++ b/app/boards/arm/choconum/choconum_base.dtsi @@ -0,0 +1,44 @@ +/* + * Copyright (c) 2020 The ZMK Contributors + * + * SPDX-License-Identifier: MIT + */ + +/dts-v1/; +#include + +/ { + model = "Keeb.io Choconum"; + compatible = "keebio,choconum", "st,stm32f072"; + + chosen { + zephyr,sram = &sram0; + zephyr,flash = &flash0; + }; +}; + +&usb { + status = "okay"; +}; + +&rtc { + status = "okay"; +}; + +&flash0 { + /* + * For more information, see: + * http://docs.zephyrproject.org/latest/guides/dts/index.html#flash-partitions + */ + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + /* Set 6Kb of storage at the end of the 128Kb of flash */ + storage_partition: partition@3e800 { + label = "storage"; + reg = <0x0001e800 0x00001800>; + }; + }; +}; diff --git a/app/boards/arm/choconum/choconum_defconfig b/app/boards/arm/choconum/choconum_defconfig new file mode 100644 index 00000000..c7c60287 --- /dev/null +++ b/app/boards/arm/choconum/choconum_defconfig @@ -0,0 +1,32 @@ +# SPDX-License-Identifier: MIT + +CONFIG_SOC_SERIES_STM32F0X=y +CONFIG_SOC_STM32F072XB=y +# 72MHz system clock +CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=72000000 + +# Floating Point Options +CONFIG_FPU=y + +# enable GPIO +CONFIG_GPIO=y + +# enable pinmux +CONFIG_PINMUX=y + +# Needed to reduce this to size that will fit on F072 +CONFIG_HEAP_MEM_POOL_SIZE=1024 + +# clock configuration +CONFIG_CLOCK_CONTROL=y + +# Clock configuration for Cube Clock control driver +CONFIG_CLOCK_STM32_SYSCLK_SRC_PLL=y +# use HSI as PLL input +CONFIG_CLOCK_STM32_PLL_SRC_HSI=y +# produce 72MHz clock at PLL output +CONFIG_CLOCK_STM32_PLL_PREDIV=1 +CONFIG_CLOCK_STM32_PLL_MULTIPLIER=12 +CONFIG_CLOCK_STM32_AHB_PRESCALER=1 +CONFIG_CLOCK_STM32_APB1_PRESCALER=2 +CONFIG_CLOCK_STM32_APB2_PRESCALER=1 diff --git a/app/boards/arm/choconum/choconum_ortho.dts b/app/boards/arm/choconum/choconum_ortho.dts new file mode 100644 index 00000000..4dbdf937 --- /dev/null +++ b/app/boards/arm/choconum/choconum_ortho.dts @@ -0,0 +1,46 @@ +/* + * Copyright (c) 2021 The ZMK Contributors + * + * SPDX-License-Identifier: MIT + */ + +#include "choconum_base.dtsi" + +/ { + chosen { + zmk,kscan = &kscan; + }; + + kscan: kscan { + compatible = "zmk,kscan-gpio-direct"; + label = "KSCAN"; + + input-gpios + = <&gpiob 2 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)> + , <&gpiob 10 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)> + , <&gpiob 3 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)> + , <&gpiob 4 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)> + + , <&gpiob 1 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)> + , <&gpiob 11 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)> + , <&gpioa 15 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)> + , <&gpiob 5 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)> + + , <&gpiob 0 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)> + , <&gpioa 4 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)> + , <&gpiob 7 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)> + , <&gpiof 0 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)> + + , <&gpioa 7 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)> + , <&gpioa 5 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)> + , <&gpiob 8 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)> + , <&gpiob 6 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)> + + , <&gpioa 4 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)> + , <&gpioa 3 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)> + , <&gpiob 9 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)> + , <&gpiof 1 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)> + ; + }; + +}; diff --git a/app/boards/arm/choconum/choconum_ortho.keymap b/app/boards/arm/choconum/choconum_ortho.keymap new file mode 100644 index 00000000..4c974d32 --- /dev/null +++ b/app/boards/arm/choconum/choconum_ortho.keymap @@ -0,0 +1,26 @@ +/* + * Copyright (c) 2020 The ZMK Contributors + * + * SPDX-License-Identifier: MIT + */ + +#include +#include + + +/ { + keymap { + compatible = "zmk,keymap"; + + default_layer { + bindings = < +&kp KP_NUMLOCK &kp KP_DIVIDE &kp KP_MULTIPLY &kp KP_MINUS +&kp KP_N7 &kp KP_N8 &kp KP_N9 &kp KP_PLUS +&kp KP_N4 &kp KP_N5 &kp KP_N6 &kp KP_PLUS +&kp KP_N1 &kp KP_N2 &kp KP_N3 &kp KP_ENTER +&kp KP_N0 &kp KP_N0 &kp KP_DOT &kp KP_ENTER + >; + }; + }; +}; + diff --git a/app/boards/arm/choconum/choconum_ortho.zmk.yml b/app/boards/arm/choconum/choconum_ortho.zmk.yml new file mode 100644 index 00000000..2df3c463 --- /dev/null +++ b/app/boards/arm/choconum/choconum_ortho.zmk.yml @@ -0,0 +1,10 @@ +file_format: "1" +id: choconum_ortho +name: Choconum (Ortho Layout) +type: board +arch: arm +features: + - keys +outputs: + - usb +url: https://keeb.io/products/choconum-kailh-choc-numpad diff --git a/app/boards/arm/choconum/choconum_ortho_defconfig b/app/boards/arm/choconum/choconum_ortho_defconfig new file mode 100644 index 00000000..c7c60287 --- /dev/null +++ b/app/boards/arm/choconum/choconum_ortho_defconfig @@ -0,0 +1,32 @@ +# SPDX-License-Identifier: MIT + +CONFIG_SOC_SERIES_STM32F0X=y +CONFIG_SOC_STM32F072XB=y +# 72MHz system clock +CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=72000000 + +# Floating Point Options +CONFIG_FPU=y + +# enable GPIO +CONFIG_GPIO=y + +# enable pinmux +CONFIG_PINMUX=y + +# Needed to reduce this to size that will fit on F072 +CONFIG_HEAP_MEM_POOL_SIZE=1024 + +# clock configuration +CONFIG_CLOCK_CONTROL=y + +# Clock configuration for Cube Clock control driver +CONFIG_CLOCK_STM32_SYSCLK_SRC_PLL=y +# use HSI as PLL input +CONFIG_CLOCK_STM32_PLL_SRC_HSI=y +# produce 72MHz clock at PLL output +CONFIG_CLOCK_STM32_PLL_PREDIV=1 +CONFIG_CLOCK_STM32_PLL_MULTIPLIER=12 +CONFIG_CLOCK_STM32_AHB_PRESCALER=1 +CONFIG_CLOCK_STM32_APB1_PRESCALER=2 +CONFIG_CLOCK_STM32_APB2_PRESCALER=1